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Subject: Pulse-Triggered (Master-Slave) Flip-flops and Data Lock-out Flip-flops
Date: Sat, 1 Jan 2011 15:21:26 +0200
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD><TITLE>Pulse-Triggered (Master-Slave) Flip-flops and Data =
Lock-out Flip-flops</TITLE>
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<P align=3Dcenter><IMG border=3D0 alt=3Dflipflop01s.gif=20
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1s.gif"=20
width=3D200 height=3D60>=20
<H1 align=3Dcenter><FONT color=3Dorange><I>Pulse-Triggered =
(Master-Slave)=20
Flip-flops</I></FONT> </H1>
<BLOCKQUOTE><B>The term <FONT color=3D#ff0080>pulse-triggered =
</FONT>means that=20
  data are entered into the flip-flop on the rising edge of the clock =
pulse, but=20
  the output does not reflect the input state until the falling edge of =
the=20
  clock pulse. &nbsp;As this kind of flip-flops are sensitive to any =
change of=20
  the input levels during the clock pulse is still HIGH, the inputs must =
be set=20
  up prior to the clock pulse's rising edge and must not be changed =
before the=20
  falling edge. &nbsp;Otherwise, ambiguous results will happen.=20
  &nbsp;<BR><BR>The three basic types of pulse-triggered flip-flops are =
S-R, J-K=20
  and D. &nbsp;Their logic symbols are shown below. &nbsp;Notice that =
they do=20
  not have the dynamic input indicator at the clock input but have <FONT =

  color=3D#0080ff>postponed output symbols</FONT> at the outputs.</B> =
</BLOCKQUOTE>
<P align=3Dcenter><IMG border=3D0 alt=3D"Pulse-Triggered flip-flops"=20
src=3D"http://www.eelab.usyd.edu.au/digital_tutorial/part2/pics/ff_puls.j=
pg"=20
width=3D404 height=3D136><BR>
<BLOCKQUOTE><B>The truth tables for the above pulse-triggered flip-flops =
are=20
  all the same as that for the edge-triggered flip-flops, except for the =
way=20
  they are clocked. &nbsp;These flip-flops are also called <FONT=20
  color=3D#ff0080>Master-Slave</FONT> flip-flops simply because their =
internal=20
  construction are divided into two sections. &nbsp;The slave section is =

  basically the same as the master section except that it is clocked on =
the=20
  inverted clock pulse and is controlled by the outputs of the master =
section=20
  rather than by the external inputs. &nbsp;The logic diagram for a =
basic=20
  master-slave S-R flip-flop is shown below.</B> </BLOCKQUOTE>
<P align=3Dcenter><IMG border=3D0 alt=3D"S-R Master-Slave"=20
src=3D"http://www.eelab.usyd.edu.au/digital_tutorial/part2/pics/flipsrms1=
.jpg"=20
width=3D523 height=3D160>=20
<P><BR>
<H1 align=3Dcenter><FONT color=3Dorange><I><A name=3DDLO>Data Lock-Out=20
Flip-flops</A></I></FONT> </H1>
<BLOCKQUOTE><B>The data lock-out flip-flop is similar to the =
pulse-triggered=20
  (master-slave) flip-flop except it has a dynamic clock input. =
&nbsp;The=20
  dynamic clock disables (<FONT color=3D#ff0080>locks out</FONT>) the =
data inputs=20
  after the rising edge of the clock pulse. &nbsp;Therefore, the inputs =
do not=20
  need to be held constant while the clock pulse is HIGH. =
&nbsp;<BR><BR>The=20
  master section of this flip-flop is like an edge-triggered device. =
&nbsp;The=20
  slave section becomes a pulse-triggered device to produce a postponed =
output=20
  on the falling edge of the clock pulse. <BR><BR>The logic symbols of =
S-R, J-K=20
  and D data lock-out flip-flops are shown below. &nbsp;Notice they all =
have the=20
  dynamic input indicator as well as the postponed output=20
symbol.<BR></B></BLOCKQUOTE>
<P align=3Dcenter><IMG border=3D0 alt=3D"Data Lock-Out flip-flops"=20
src=3D"http://www.eelab.usyd.edu.au/digital_tutorial/part2/pics/ff_dlo.jp=
g"=20
width=3D397 height=3D140><BR>
<BLOCKQUOTE><B>Again, the above data lock-out flip-flops have same the =
truth=20
  tables as that for the edge-triggered flip-flops, except for the way =
they are=20
  clocked.</B><BR><BR><BR><BR></BLOCKQUOTE>
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