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<HTML><HEAD><TITLE>Example 1.1</TITLE>
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f>
<P>This example is taken from D. D. Gajski, <EM>Principles of Digital=20
Design</EM>, Prentice Hall, 1997, p.230.</P>
<P><FONT color=3D#0000ff><STRONG><BIG>Example 1.1</BIG></STRONG></FONT>. =

<BIG><FONT face=3DArial>Modulo-4 counter</FONT></BIG></P>
<P><FONT face=3DArial>Derive the state table and state diagram for the =
sequential=20
circuit shown in Figure 7.</FONT></P>
<TABLE border=3D0 width=3D"66%">
  <TBODY>
  <TR>
    <TD width=3D"56%"><IMG alt=3D"example1-1.gif (5837 bytes)"=20
      =
src=3D"http://www.eelab.usyd.edu.au/digital_tutorial/part3/example1-1.gif=
"=20
      width=3D377 height=3D270></TD>
    <TD width=3D"44%">&nbsp;
      <P align=3Dleft><BIG>Figure 7. Logic schematic of a sequential=20
      circuit.</BIG></P></TD></TR></TBODY></TABLE>
<P align=3Dleft><BIG><STRONG>SOLUTION</STRONG></BIG>:</P>
<P align=3Dleft><FONT face=3DArial><FONT color=3D#0000ff><STRONG>STEP=20
1</STRONG></FONT>: &nbsp;&nbsp;&nbsp; First we derive the Boolean =
expressions=20
for the inputs of each flip-flops in the schematic, in terms of external =
input=20
Cnt and the flip-flop outputs Q1 and Q0. Since there are two D =
flip-flops in=20
this example, we derive two expressions for D1 and D0:</FONT></P>
<DIV align=3Dleft>
<TABLE border=3D0 width=3D522 height=3D1>
  <TBODY>
  <TR>
    <TD height=3D1 =
width=3D522><STRONG><BIG>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; D0 =3D=20
      Cnt</BIG><IMG alt=3D"ex-or.gif (942 bytes)"=20
      =
src=3D"http://www.eelab.usyd.edu.au/digital_tutorial/part3/ex-or.gif"=20
      width=3D18 height=3D17><FONT face=3D"Times New Roman"><BIG>Q0 =3D =
Cnt'*Q0 +=20
      Cnt*Q0'</BIG></FONT></STRONG></TD></TR>
  <TR>
    <TD height=3D1 width=3D522><STRONG><BIG><FONT=20
      face=3D"Times New Roman">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; D1 =3D =
Cnt'*Q1 +=20
      Cnt*Q1'*Q0 + =
Cnt*Q1*Q0'</FONT></BIG></STRONG></TD></TR></TBODY></TABLE></DIV>
<P><FONT face=3DArial>These Boolean expressions are called =
<STRONG>excitation=20
equations</STRONG> since they represent the inputs to the flip-flops of =
the=20
sequential circuit in the next clock cycle.</FONT></P>
<P><FONT face=3DArial><FONT color=3D#0000ff><STRONG>STEP =
2:</STRONG></FONT>=20
&nbsp;&nbsp;&nbsp; Derive the next-state equations by converting these=20
excitation equations into flip-flop characteristic equations. In the =
case of D=20
flip-flops, Q(next) =3D D. Therefore the next state equal the excitation =

equations.</FONT></P>
<DIV align=3Dleft>
<TABLE border=3D0 width=3D616 height=3D1>
  <TBODY>
  <TR>
    <TD height=3D1 =
width=3D616><STRONG><BIG>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
      Q0</BIG><SMALL>(next)</SMALL><BIG> =3D D<FONT face=3D"Times New =
Roman">0 =3D=20
      Cnt'*Q0 + Cnt*Q0'</FONT></BIG></STRONG></TD></TR>
  <TR>
    <TD height=3D1 width=3D616><STRONG><FONT=20
      face=3D"Times New Roman"><BIG>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
      Q1</BIG><SMALL>(next)</SMALL><BIG> =3D D1 =3D Cnt'*Q1 + Cnt*Q1'*Q0 =
+=20
      Cnt*Q1*Q0'</BIG></FONT></STRONG></TD></TR></TBODY></TABLE></DIV>
<P><FONT face=3DArial><FONT color=3D#0000ff><STRONG>STEP =
3</STRONG></FONT>:=20
&nbsp;&nbsp;&nbsp; Now convert these next-state equations into tabular =
form=20
called the next-state table.</FONT></P>
<TABLE border=3D1 width=3D"53%">
  <TBODY>
  <TR>
    <TD bgColor=3D#ff8040 width=3D"46%" align=3Dmiddle><STRONG>Present=20
State</STRONG>
      <TABLE border=3D0 width=3D"100%">
        <TBODY>
        <TR>
          <TD width=3D"100%">
            <P align=3Dcenter>Q1Q0</P></TD></TR></TBODY></TABLE></TD>
    <TD bgColor=3D#ff8040 width=3D"54%" align=3Dmiddle><STRONG>Next =
State</STRONG>
      <TABLE border=3D0 width=3D"100%">
        <TBODY>
        <TR>
          <TD width=3D"50%" align=3Dmiddle>Cnt =3D 0</TD>
          <TD width=3D"50%" align=3Dmiddle>Cnt =3D =
1</TD></TR></TBODY></TABLE></TD></TR>
  <TR>
    <TD width=3D"46%">
      <TABLE border=3D0 width=3D"100%">
        <TBODY>
        <TR>
          <TD width=3D"100%" align=3Dmiddle>0 0</TD></TR>
        <TR>
          <TD width=3D"100%" align=3Dmiddle>0 1</TD></TR>
        <TR>
          <TD width=3D"100%" align=3Dmiddle>1 0</TD></TR>
        <TR>
          <TD width=3D"100%" align=3Dmiddle>1 =
1</TD></TR></TBODY></TABLE></TD>
    <TD width=3D"54%">
      <TABLE border=3D0 width=3D"100%">
        <TBODY>
        <TR>
          <TD width=3D"50%" align=3Dmiddle>0 0</TD>
          <TD width=3D"50%" align=3Dmiddle>0 1</TD></TR>
        <TR>
          <TD width=3D"50%" align=3Dmiddle>0 1</TD>
          <TD width=3D"50%" align=3Dmiddle>1 0</TD></TR>
        <TR>
          <TD width=3D"50%" align=3Dmiddle>1 0</TD>
          <TD width=3D"50%" align=3Dmiddle>1 1</TD></TR>
        <TR>
          <TD width=3D"50%" align=3Dmiddle>1 1</TD>
          <TD width=3D"50%" align=3Dmiddle>0=20
0</TD></TR></TBODY></TABLE></TD></TR></TBODY></TABLE>
<P><FONT face=3DArial>Each row is corresponding to a state of the =
sequential=20
circuit and each column represents one set of input values. Since we =
have two=20
flip-flops, the number of possible states is four - that is, Q1Q0 can be =
equal=20
to 00, 01, 10, or 11. These are present states as shown in the =
table.</FONT></P>
<P><FONT face=3DArial>For the next state part of the table, each entry =
defines the=20
value of the sequential circuit in the next clock cycle after the rising =
edge of=20
the <STRONG><FONT color=3D#000000>Clk</FONT></STRONG>. Since this value =
depends on=20
the present state and the value of the input signals, the next state =
table will=20
contain one column for each assignment of binary values to the input =
signals. In=20
this example, since there is only one input signal, =
<STRONG>Cnt</STRONG>, the=20
next-state table shown has only two columns, corresponding to =
<STRONG>Cnt =3D 0=20
and Cnt =3D 1</STRONG>.</FONT></P>
<P><FONT face=3DArial>Note that each entry in the next-state table =
indicates the=20
values of the flip-flops in the next state if their value in the present =
state=20
is in the row header and the input values in the column =
header.</FONT></P>
<P><FONT face=3DArial>Each of these next-state values has been computed =
from the=20
next-state equations in STEP 2.</FONT></P>
<P><FONT face=3DArial><FONT color=3D#0000ff><STRONG>STEP =
4</STRONG></FONT>:=20
&nbsp;&nbsp;&nbsp; The state diagram is generated directly from the =
next-state=20
table, shown in Figure 8.</FONT></P>
<TABLE border=3D0 width=3D"60%">
  <TBODY>
  <TR>
    <TD width=3D"50%"><IMG alt=3D"state1-1.gif (5058 bytes)"=20
      =
src=3D"http://www.eelab.usyd.edu.au/digital_tutorial/part3/state1-1.gif" =

      width=3D349 height=3D258></TD>
    <TD width=3D"50%">
      <P align=3Dleft><BIG>Figure 8. State =
diagram</BIG></P></TD></TR></TBODY></TABLE>
<P align=3Dleft><FONT face=3DArial>Each arc is labelled with the values =
of the input=20
signals that cause the transition from the present state (the source of =
the arc)=20
to the next state (the destination of the arc).</FONT></P>
<P align=3Dleft><FONT face=3DArial>In general, the number of states in a =
next-state=20
table or a state diagram will equal 2<SUP>m </SUP>, where m is the =
number of=20
flip-flops. Similarly, the number of arcs will equal 2<SUP>m </SUP>x=20
2<SUP>k</SUP> , where k is the number of binary input signals. =
Therefore, in the=20
state diagram, there must be four states and eight transitions. =
Following these=20
transition arcs, we can see that as long as Cnt =3D 1, the sequential =
circuit goes=20
through the states in the following sequence: <FONT =
color=3D#ff0080><STRONG>0, 1,=20
2, 3, 0, 1, 2</STRONG></FONT>, ....&nbsp; On the other hand, when Cnt =
=3D 0, the=20
circuit stays in its present state until Cnt changes to 1, at which the =
counting=20
continues.</FONT></P>
<P align=3Dleft><FONT face=3DArial>Since this sequence is characteristic =
of modulo-4=20
counting, we can conclude that the sequential circuit in Figure 7 is a =
modulo-4=20
counter with one control signal, Cnt, which enables counting when Cnt =
=3D 1 and=20
disables it when Cnt =3D 0.</FONT></P>
<P align=3Dleft><IMG alt=3D"cnting.gif (4724 bytes)"=20
src=3D"http://www.eelab.usyd.edu.au/digital_tutorial/part3/cnting.gif" =
width=3D77=20
height=3D68></P>
<P align=3Dleft><FONT face=3DArial>To see how the states changes =
corresponding to=20
the input signals Cnt</FONT>, click on this image.<A=20
href=3D"javascript:loadSession('state1-1.htm')"><IMG alt=3D"circle.gif =
(1149 bytes)"=20
src=3D"http://www.eelab.usyd.edu.au/digital_tutorial/part3/circle.gif" =
width=3D49=20
height=3D45></A></P>
<P align=3Dleft><FONT face=3DArial>Below, we show a timing diagram, =
representing=20
four clock cycles, which enables us to observe the behaviour of the =
counter in=20
greater detail.</FONT></P>
<TABLE border=3D0 width=3D"70%">
  <TBODY>
  <TR>
    <TD width=3D"50%"><IMG alt=3D"timing1-1.gif (6433 bytes)"=20
      =
src=3D"http://www.eelab.usyd.edu.au/digital_tutorial/part3/timing1-1.gif"=
=20
      width=3D433 height=3D318></TD>
    <TD width=3D"50%">&nbsp;
      <P align=3Dleft><BIG>Figure 9. Timing =
Diagram</BIG></P></TD></TR></TBODY></TABLE>
<P align=3Dleft><FONT face=3DArial>In this timing diagram we have =
assumed that Cnt=20
is asserted in clock cycle 0 at t<SUB>0</SUB> and is disasserted in =
clock cycle=20
3 at time t<SUB>4</SUB>. We have also assumed that the counter is in =
state Q1Q0=20
=3D 00 in the clock cycle 0. Note that on the clock's rising edge, at=20
t<SUB>1</SUB>, the counter will go to state Q1Q0 =3D 01 with a slight =
propagation=20
delay; in cycle 2, after t<SUB>2</SUB>, to Q1Q0 =3D 10; and in cycle 3, =
after=20
t<SUB>3</SUB> to Q1Q0 =3D 11. Since Cnt becomes 0 at t<SUB>4</SUB>, we =
know that=20
the counter will stay in state Q1Q0 =3D 11 in the next clock cycle. To =
see the=20
timing behaviour of the circuit click on this image <A=20
href=3D"javascript:loadSession('animate1.htm')"><IMG alt=3D"signal.gif =
(1039 bytes)"=20
src=3D"http://www.eelab.usyd.edu.au/digital_tutorial/part3/signal.gif" =
width=3D70=20
height=3D25></A>.</FONT></P>
<P align=3Dleft><FONT face=3DArial>In Example 1.1 we demonstrated the =
analysis of a=20
sequential circuit that has no outputs by developing a next-state table =
and=20
state diagram which describes only the states and the transitions from =
one state=20
to the next. In the next example we complicate our analysis by adding =
output=20
signals, which means that we have to upgrade the next-state table and =
the state=20
diagram to identify the value of output signals in each =
state.</FONT></P>
<P align=3Dleft><BIG><A=20
href=3D"http://www.eelab.usyd.edu.au/digital_tutorial/part3/example1-2.ht=
m"><STRONG>Example=20
1.2</STRONG></A></BIG></P>
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